Computer Organization and Assembly Language Programming
LEC01 Overview of the Course
This is the introduction of the course "Computer Organization and Assembly Language Programming". This video gives course information like a discussion about the course matrix and the links from where the e-books, tools, code snippets, and lecture slides, and other misc resources can be downloaded. This course will be having two parts in the first half of the course we will be designing and writing the HDL of a full-blown computer, will design its machine and assembly language, will write programs and execute those programs on the designed h/w architecture. At the end of the first half of the course, we will also design and write an Assembler (in C) for the designed computer. The second half of the course will deal with the assembly of the all-time famous x86-64 architecture.
email: arif@pucit.edu.pk
web: http://arifbutt.me
Sample Codes/Resources: https://bitbucket.org/arifpucit/coal-repo/
This is the introduction of the course "Computer Organization and Assembly Language Programming". This video gives course information like a discussion about the course matrix and the links from where the e-books, tools, code snippets, and lecture slides, and other misc resources can be downloaded. This course will be having two parts in the first half of the course we will be designing and writing the HDL of a full-blown computer, will design its machine and assembly language, will write programs and execute those programs on the designed h/w architecture. At the end of the first half of the course, we will also design and write an Assembler (in C) for the designed computer. The second half of the course will deal with the assembly of the all-time famous x86-64 architecture.
email: arif@pucit.edu.pk
web: http://arifbutt.me
Sample Codes/Resources: https://bitbucket.org/arifpucit/coal-repo/
Lec 02 HDL for Combinational Circuits - I (Arif Butt @ PUCIT)
Review of Boolean logic and some elementary logic gates. Types HDLs, e.g., System Verilog, Verilog, VHDL, and HDL by Noam+Shemon. Write HDL programs for AND, OR, and NOT gate chips using the universal built-in NAND gate. Where to download the hardware simulator for this course? A demo/description of the GUI and working of Hardware Simulator and interactive testing of the chips designed in this session.
email: arif@pucit.edu.pk
web: http://arifbutt.me
Sample Codes/Resources: https://bitbucket.org/arifpucit/coal-repo/
Review of Boolean logic and some elementary logic gates. Types HDLs, e.g., System Verilog, Verilog, VHDL, and HDL by Noam+Shemon. Write HDL programs for AND, OR, and NOT gate chips using the universal built-in NAND gate. Where to download the hardware simulator for this course? A demo/description of the GUI and working of Hardware Simulator and interactive testing of the chips designed in this session.
email: arif@pucit.edu.pk
web: http://arifbutt.me
Sample Codes/Resources: https://bitbucket.org/arifpucit/coal-repo/
Lec 03 HDL for Combinational Circuits - II (Arif Butt @ PUCIT)
Design and HDL code for XOR chip, using And, OR, Not gate chips. A demo of Verification of XOR chip using interactive chip testing in the h/w simulator. A brief overview of script-based chip testing. Writing script for testing of the designed XOR chip. A discussion on key players involved in a hardware construction project.
email: arif@pucit.edu.pk
web: http://arifbutt.me
Sample Codes/Resources: https://bitbucket.org/arifpucit/coal-repo/
Design and HDL code for XOR chip, using And, OR, Not gate chips. A demo of Verification of XOR chip using interactive chip testing in the h/w simulator. A brief overview of script-based chip testing. Writing script for testing of the designed XOR chip. A discussion on key players involved in a hardware construction project.
email: arif@pucit.edu.pk
web: http://arifbutt.me
Sample Codes/Resources: https://bitbucket.org/arifpucit/coal-repo/
Lec 04 HDL for Combinational Circuits - III (Arif Butt @ PUCIT)
Design and HDL code for some standard combinational circuits like Encoder, Decoders, Multiplexers, and De-Multiplexer chips. A demo of Verification / Testing of these standard combinational chips using interactive chip testing in the h/w simulator.
email: arif@pucit.edu.pk
web: http://arifbutt.me
Sample Codes/Resources: https://bitbucket.org/arifpucit/coal-repo/
Design and HDL code for some standard combinational circuits like Encoder, Decoders, Multiplexers, and De-Multiplexer chips. A demo of Verification / Testing of these standard combinational chips using interactive chip testing in the h/w simulator.
email: arif@pucit.edu.pk
web: http://arifbutt.me
Sample Codes/Resources: https://bitbucket.org/arifpucit/coal-repo/
Lec 05 HDL for Combinational Circuits - IV (Arif Butt @ PUCIT)
Design and HDL code for multi-bit gates. The concept of buses and the design of chips having buses as input. Design and code of And16, Or16, Not16, and Mux16 chips having 16-bits inputs. Design and code of And4way16 and similar chips having four inputs with each input of 16 bits.
email: arif@pucit.edu.pk
web: http://arifbutt.me
Sample Codes/Resources: https://bitbucket.org/arifpucit/coal-repo/
Design and HDL code for multi-bit gates. The concept of buses and the design of chips having buses as input. Design and code of And16, Or16, Not16, and Mux16 chips having 16-bits inputs. Design and code of And4way16 and similar chips having four inputs with each input of 16 bits.
email: arif@pucit.edu.pk
web: http://arifbutt.me
Sample Codes/Resources: https://bitbucket.org/arifpucit/coal-repo/
Lec 06 Data Storage - I (Arif Butt @ PUCIT)
Data Representation in Computers, Unsigned, and Signed Numbers, Sign magnitude representation & its limitations, 1s Complement representation & its limitations, 2s Complement representation, Comparisons and pros and cons of each, Ranges and different Storage Sizes, Overflow in Unsigned & Signed Numbers, How the Hardware Detect an Overflow, Concept of Sign Extension, Encoding Characters and Strings (ASCII & Unicode)
email: arif@pucit.edu.pk
web: http://arifbutt.me
Sample Codes/Resources: https://bitbucket.org/arifpucit/coal-repo/
Data Representation in Computers, Unsigned, and Signed Numbers, Sign magnitude representation & its limitations, 1s Complement representation & its limitations, 2s Complement representation, Comparisons and pros and cons of each, Ranges and different Storage Sizes, Overflow in Unsigned & Signed Numbers, How the Hardware Detect an Overflow, Concept of Sign Extension, Encoding Characters and Strings (ASCII & Unicode)
email: arif@pucit.edu.pk
web: http://arifbutt.me
Sample Codes/Resources: https://bitbucket.org/arifpucit/coal-repo/
Lec 07 Data Storage - lI (Arif Butt @ PUCIT)
Encoding Real Number, Fixed Point Representation, Floating-Point Representations (IEEE-754), Storage layout, Conversion Examples, Range and Precision of IEEE-754, Arithmetic Operations, Overflow and Underflow, IEEE-754 Special Values
email: arif@pucit.edu.pk
web: http://arifbutt.me
Sample Codes/Resources: https://bitbucket.org/arifpucit/coal-repo/
Encoding Real Number, Fixed Point Representation, Floating-Point Representations (IEEE-754), Storage layout, Conversion Examples, Range and Precision of IEEE-754, Arithmetic Operations, Overflow and Underflow, IEEE-754 Special Values
email: arif@pucit.edu.pk
web: http://arifbutt.me
Sample Codes/Resources: https://bitbucket.org/arifpucit/coal-repo/
Lec 08 Design of ALU - I (Arif Butt @ PUCIT)
Review of HDL for Combinational Circuits, Designing a single bit Logic Unit Writing HDL for Combinational Arithmetic Circuits like Half Adder, Full Adder, Full Subtractor, 16-bit Binary Adder (Add16 chip), 16-bit Incrementer (Inc16 chip), Demo of above chips on H/W Simulator
email: arif@pucit.edu.pk
web: http://arifbutt.me
Sample Codes/Resources: https://bitbucket.org/arifpucit/coal-repo/
Review of HDL for Combinational Circuits, Designing a single bit Logic Unit Writing HDL for Combinational Arithmetic Circuits like Half Adder, Full Adder, Full Subtractor, 16-bit Binary Adder (Add16 chip), 16-bit Incrementer (Inc16 chip), Demo of above chips on H/W Simulator
email: arif@pucit.edu.pk
web: http://arifbutt.me
Sample Codes/Resources: https://bitbucket.org/arifpucit/coal-repo/
Lec 09 Design of ALU-II (Arif Butt @ PUCIT)
Components of a Computer System, Design of ALU, The Hack ALU, The Hack ALU Operations, Design of Hack ALU, HDL of Hack ALU, Verifying the ALU chip on H/W Simulator
email: arif@pucit.edu.pk
web: http://arifbutt.me
Sample Codes/Resources: https://bitbucket.org/arifpucit/coal-repo/
Components of a Computer System, Design of ALU, The Hack ALU, The Hack ALU Operations, Design of Hack ALU, HDL of Hack ALU, Verifying the ALU chip on H/W Simulator
email: arif@pucit.edu.pk
web: http://arifbutt.me
Sample Codes/Resources: https://bitbucket.org/arifpucit/coal-repo/
Lec 10 HDL for Sequential Circuits (Arif Butt @ PUCIT)
What is the need for Sequential Circuits, when we have combinational circuits? Understanding Time in Circuits, Combinational vs Sequential Circuits, Flip Flops vs Latches, Types of flipflops, and their characteristics: D flip Flop, SR Flip Flop, JK Flip Flop, T Flip Flop.
email: arif@pucit.edu.pk
web: http://arifbutt.me
Sample Codes/Resources: https://bitbucket.org/arifpucit/coal-repo/
What is the need for Sequential Circuits, when we have combinational circuits? Understanding Time in Circuits, Combinational vs Sequential Circuits, Flip Flops vs Latches, Types of flipflops, and their characteristics: D flip Flop, SR Flip Flop, JK Flip Flop, T Flip Flop.
email: arif@pucit.edu.pk
web: http://arifbutt.me
Sample Codes/Resources: https://bitbucket.org/arifpucit/coal-repo/
Lec 11 Design of Registers (Arif Butt @ PUCIT)
What are Registers, Design of 1-bit Register, HDL for 1-bit Register, Design of 16-bit Register, HDL for 16-bit Register
email: arif@pucit.edu.pk
web: http://arifbutt.me
Sample Codes/Resources: https://bitbucket.org/arifpucit/coal-repo/
What are Registers, Design of 1-bit Register, HDL for 1-bit Register, Design of 16-bit Register, HDL for 16-bit Register
email: arif@pucit.edu.pk
web: http://arifbutt.me
Sample Codes/Resources: https://bitbucket.org/arifpucit/coal-repo/
Lec 12 Design of Memory Chips (Arif Butt @ PUCIT)
Concept of Memory Hierarchy, Multi-Byte Read/Write, Design of Random Access Memory, Read/Write Logic of RAM, API of a RAM Chip, HDL of 8 Words RAM, HDL of 64 Words RAM, HDL of 512 Words RAM, HDL of 4K Words RAM, HDL of 16K Words RAM
email: arif@pucit.edu.pk
web: http://arifbutt.me
Sample Codes/Resources: https://bitbucket.org/arifpucit/coal-repo/
Concept of Memory Hierarchy, Multi-Byte Read/Write, Design of Random Access Memory, Read/Write Logic of RAM, API of a RAM Chip, HDL of 8 Words RAM, HDL of 64 Words RAM, HDL of 512 Words RAM, HDL of 4K Words RAM, HDL of 16K Words RAM
email: arif@pucit.edu.pk
web: http://arifbutt.me
Sample Codes/Resources: https://bitbucket.org/arifpucit/coal-repo/
Lec 13 Design of Counters (Arif Butt @ PUCIT)
Overview of Hack Computer Components, Overview of Counters, Why do we need Counter for our Hack Computer, Concept of Program Counter, Counter Simulation, Design and Implementation of PC for Hack Computer, Demo on H/W Simulator
email: arif@pucit.edu.pk
web: http://arifbutt.me
Sample Codes/Resources: https://bitbucket.org/arifpucit/coal-repo/
Overview of Hack Computer Components, Overview of Counters, Why do we need Counter for our Hack Computer, Concept of Program Counter, Counter Simulation, Design and Implementation of PC for Hack Computer, Demo on H/W Simulator
email: arif@pucit.edu.pk
web: http://arifbutt.me
Sample Codes/Resources: https://bitbucket.org/arifpucit/coal-repo/
Lec 14 ISA - I (Arif Butt @ PUCIT)
Overview of Computer System, Universality of Computer System, Turing Machine, Von Neumann Architecture, Instruction Set Architecture (ISA)
email: arif@pucit.edu.pk
web: http://arifbutt.me
Sample Codes/Resources: https://bitbucket.org/arifpucit/coal-repo/
Overview of Computer System, Universality of Computer System, Turing Machine, Von Neumann Architecture, Instruction Set Architecture (ISA)
email: arif@pucit.edu.pk
web: http://arifbutt.me
Sample Codes/Resources: https://bitbucket.org/arifpucit/coal-repo/
Lec 15 ISA - II (Arif Butt @ PUCIT)
Five Dimensions of ISA, Class of ISA, Types, and Sizes of Operands, Operations (including control flow instructions), Memory Addressing Models and Addressing Modes, Encoding an ISA
email: arif@pucit.edu.pk
web: http://arifbutt.me
Sample Codes/Resources: https://bitbucket.org/arifpucit/coal-repo/
Five Dimensions of ISA, Class of ISA, Types, and Sizes of Operands, Operations (including control flow instructions), Memory Addressing Models and Addressing Modes, Encoding an ISA
email: arif@pucit.edu.pk
web: http://arifbutt.me
Sample Codes/Resources: https://bitbucket.org/arifpucit/coal-repo/
Lec 16 Hack Machine Language - I (Arif Butt @ PUCIT)
Hack Computer Machine Language, Review of h/w of Hack Computer, Software of Hack Computer, Types of Hack machine instructions: A-Instruction, C-Instruction, with examples.
email: arif@pucit.edu.pk
web: http://arifbutt.me
Sample Codes/Resources: https://bitbucket.org/arifpucit/coal-repo/
Hack Computer Machine Language, Review of h/w of Hack Computer, Software of Hack Computer, Types of Hack machine instructions: A-Instruction, C-Instruction, with examples.
email: arif@pucit.edu.pk
web: http://arifbutt.me
Sample Codes/Resources: https://bitbucket.org/arifpucit/coal-repo/
Lec 17 Hack Machine Language - II (Arif Butt @ PUCIT)
Review of Hack Symbolic Machine Instructions, A Instruction, C Instruction, Binary Code Format of Hack Computer Instruction, Encoding of 16 bit A-Instruction, Encoding of 16 bit C-Instruction, Examples, A Complete Hack Program: Assembly Language
email: arif@pucit.edu.pk
web: http://arifbutt.me
Sample Codes/Resources: https://bitbucket.org/arifpucit/coal-repo/
Review of Hack Symbolic Machine Instructions, A Instruction, C Instruction, Binary Code Format of Hack Computer Instruction, Encoding of 16 bit A-Instruction, Encoding of 16 bit C-Instruction, Examples, A Complete Hack Program: Assembly Language
email: arif@pucit.edu.pk
web: http://arifbutt.me
Sample Codes/Resources: https://bitbucket.org/arifpucit/coal-repo/
Lec 18 Interfacing IO devices with Hack Computer (Arif Butt @ PUCIT)
How to interface I/O devices with a computer, memory-mapped I/O, isolated I/O, Interfacing Screen with Hack computer, Demo of built-in Screen chip on h/w Simulator, Interfacing Keyboard with Hack computer, Demo of built-in Keyboard chip on h/w Simulator
email: arif@pucit.edu.pk
web: http://arifbutt.me
Sample Codes/Resources: https://bitbucket.org/arifpucit/coal-repo/
How to interface I/O devices with a computer, memory-mapped I/O, isolated I/O, Interfacing Screen with Hack computer, Demo of built-in Screen chip on h/w Simulator, Interfacing Keyboard with Hack computer, Demo of built-in Keyboard chip on h/w Simulator
email: arif@pucit.edu.pk
web: http://arifbutt.me
Sample Codes/Resources: https://bitbucket.org/arifpucit/coal-repo/
Lec 19 Hack Assembly Programming - I (Arif Butt @ PUCIT)
Review of Hack Computer Assembly Instructions, Hack Assembly Programs, A Hello World in Hack assembly, Hack CPU Emulator, Demo, Program Termination
email: arif@pucit.edu.pk
web: http://arifbutt.me
Sample Codes/Resources: https://bitbucket.org/arifpucit/coal-repo/
Review of Hack Computer Assembly Instructions, Hack Assembly Programs, A Hello World in Hack assembly, Hack CPU Emulator, Demo, Program Termination
email: arif@pucit.edu.pk
web: http://arifbutt.me
Sample Codes/Resources: https://bitbucket.org/arifpucit/coal-repo/
Lec 20 Hack Assembly Programming - II (Arif Butt @ PUCIT)
Recap previous lecture, Symbols in Hack Assembly Language, Built-in Symbols, Label Symbols, Variable Symbols, Branching, Iteration, with examples.
email: arif@pucit.edu.pk
web: http://arifbutt.me
Sample Codes/Resources: https://bitbucket.org/arifpucit/coal-repo/
Recap previous lecture, Symbols in Hack Assembly Language, Built-in Symbols, Label Symbols, Variable Symbols, Branching, Iteration, with examples.
email: arif@pucit.edu.pk
web: http://arifbutt.me
Sample Codes/Resources: https://bitbucket.org/arifpucit/coal-repo/
Lec 21 Hack Assembly Programming - III (Arif Butt @ PUCIT)
Review of Hack Assembly Programs, Pointers and Arrays, Input / Output Instructions, Debugging, Review of Hack Assembly Programs, Pointers and Arrays, Input / Output Instructions, Debugging.
email: arif@pucit.edu.pk
web: http://arifbutt.me
Sample Codes/Resources: https://bitbucket.org/arifpucit/coal-repo/
Review of Hack Assembly Programs, Pointers and Arrays, Input / Output Instructions, Debugging, Review of Hack Assembly Programs, Pointers and Arrays, Input / Output Instructions, Debugging.
email: arif@pucit.edu.pk
web: http://arifbutt.me
Sample Codes/Resources: https://bitbucket.org/arifpucit/coal-repo/
Lec 22 Data Path of Hack CPU - I (Arif Butt @ PUCIT)
Von Neumann Architecture, Flow of Information inside Computers, Buses, Data Bus, Address Bus, Control Bus, Fetch Execute Cycle, Fetch Execute Clash, Harvard Architecture
email: arif@pucit.edu.pk
web: http://arifbutt.me
Sample Codes/Resources: https://bitbucket.org/arifpucit/coal-repo/
Von Neumann Architecture, Flow of Information inside Computers, Buses, Data Bus, Address Bus, Control Bus, Fetch Execute Cycle, Fetch Execute Clash, Harvard Architecture
email: arif@pucit.edu.pk
web: http://arifbutt.me
Sample Codes/Resources: https://bitbucket.org/arifpucit/coal-repo/
Lec 23 Data Path of Hack CPU - II (Arif Butt @ PUCIT)
Review of Hack Computer Architecture, Hack CPU Interface, Hack CPU Implementation, Input/output and Operations of Hack ALU, Control Logic of Hack CPU
email: arif@pucit.edu.pk
web: http://arifbutt.me
Sample Codes/Resources: https://bitbucket.org/arifpucit/coal-repo/
Review of Hack Computer Architecture, Hack CPU Interface, Hack CPU Implementation, Input/output and Operations of Hack ALU, Control Logic of Hack CPU
email: arif@pucit.edu.pk
web: http://arifbutt.me
Sample Codes/Resources: https://bitbucket.org/arifpucit/coal-repo/
Lec 24 Design of Hack Computer (Arif Butt @ PUCIT)
Recap of Hack Computer Architecture, Implementation of Hack CPU Chip (CPU.hdl), Implementation of Hack Memory Chip (Memory.hdl), RAM16 chip (RAM16K.hdl), Screen chip (Screen.hdl), Keyboard chip (Keyboard.hdl), Implementation of Hack ROM Chip (ROM32K.hdl), Implementation of Hack Computer Chip (Computer.hdl)
email: arif@pucit.edu.pk
web: http://arifbutt.me
Sample Codes/Resources: https://bitbucket.org/arifpucit/coal-repo/
Recap of Hack Computer Architecture, Implementation of Hack CPU Chip (CPU.hdl), Implementation of Hack Memory Chip (Memory.hdl), RAM16 chip (RAM16K.hdl), Screen chip (Screen.hdl), Keyboard chip (Keyboard.hdl), Implementation of Hack ROM Chip (ROM32K.hdl), Implementation of Hack Computer Chip (Computer.hdl)
email: arif@pucit.edu.pk
web: http://arifbutt.me
Sample Codes/Resources: https://bitbucket.org/arifpucit/coal-repo/
Lec 25 Design of Hack Assembler (Arif Butt @ PUCIT)
What is an Assembler? How does an Assembler work? Hack Machine Language Specification, Demo of Built-in Hack Assembler, Design of Hack Assembler (w/o Symbols), Design of Hack Assembler (with Symbols), Hack Assembler Implementation in C , Executing Hack Machine Code on Hack Computer Chip in h/w Simulator and CPU Emulator.
email: arif@pucit.edu.pk
web: http://arifbutt.me
Sample Codes/Resources: https://bitbucket.org/arifpucit/coal-repo/
What is an Assembler? How does an Assembler work? Hack Machine Language Specification, Demo of Built-in Hack Assembler, Design of Hack Assembler (w/o Symbols), Design of Hack Assembler (with Symbols), Hack Assembler Implementation in C , Executing Hack Machine Code on Hack Computer Chip in h/w Simulator and CPU Emulator.
email: arif@pucit.edu.pk
web: http://arifbutt.me
Sample Codes/Resources: https://bitbucket.org/arifpucit/coal-repo/
Lec 26 Evolution of Intel Microprocessors (Arif Butt @ PUCIT)
Intel 4004 (1971), Intel 8008, Intel 8080, Intel 8086 (x86), Intel 80286, Intel 80386, Intel 80486, Intel 80586 (Pentium P5), Intel 80686 (Pentium P6), Intel Core (2006), Intel Nehalam (2008), Intel Sandy Bridge, Intel Ivy Bridge, Intel Haswell, Intel Broadwell, Intel Sky Lake, Intel Kaby Lake, Intel Coffee Lake, Intel Coffee Lake Refresh, Intel Comet Lake (2019)
email: arif@pucit.edu.pk
web: http://arifbutt.me
Sample Codes/Resources: https://bitbucket.org/arifpucit/coal-repo/
Intel 4004 (1971), Intel 8008, Intel 8080, Intel 8086 (x86), Intel 80286, Intel 80386, Intel 80486, Intel 80586 (Pentium P5), Intel 80686 (Pentium P6), Intel Core (2006), Intel Nehalam (2008), Intel Sandy Bridge, Intel Ivy Bridge, Intel Haswell, Intel Broadwell, Intel Sky Lake, Intel Kaby Lake, Intel Coffee Lake, Intel Coffee Lake Refresh, Intel Comet Lake (2019)
email: arif@pucit.edu.pk
web: http://arifbutt.me
Sample Codes/Resources: https://bitbucket.org/arifpucit/coal-repo/
Lec 27 On Improving Processors Performance (Arif Butt @ PUCIT)
CPU Performance Equation, Single Cycle vs Multi Cycle CPU Architecture, Pipelined CPU Architecture, Pipeline Stages, Even vs Uneven pipelined stages, Pipelined Hazards, Solutions of Pipeline Hazards, CISC vs RISC Architecture
email: arif@pucit.edu.pk
web: http://arifbutt.me
Sample Codes/Resources: https://bitbucket.org/arifpucit/coal-repo/
CPU Performance Equation, Single Cycle vs Multi Cycle CPU Architecture, Pipelined CPU Architecture, Pipeline Stages, Even vs Uneven pipelined stages, Pipelined Hazards, Solutions of Pipeline Hazards, CISC vs RISC Architecture
email: arif@pucit.edu.pk
web: http://arifbutt.me
Sample Codes/Resources: https://bitbucket.org/arifpucit/coal-repo/
Lec 28 Programming Model of x86 Architecture (Arif Butt @ PUCIT)
Layout of memory models (flat, segmented) and register set file of Intel 8080, 80386, x86-64. Logical to physical address translation for segmented memory model.
email: arif@pucit.edu.pk
web: http://arifbutt.me
Sample Codes/Resources: https://bitbucket.org/arifpucit/coal-repo/
Layout of memory models (flat, segmented) and register set file of Intel 8080, 80386, x86-64. Logical to physical address translation for segmented memory model.
email: arif@pucit.edu.pk
web: http://arifbutt.me
Sample Codes/Resources: https://bitbucket.org/arifpucit/coal-repo/
Lec 29 Hello World in x86 64 Assembly (Arif Butt @ PUCIT)
Overview of microprocessor families and their corresponding assembly languages. Toolchain and programming environment for x86-64 assembly programming. Running the first hello world assembly program.
email: arif@pucit.edu.pk
web: http://arifbutt.me
Sample Codes/Resources: https://bitbucket.org/arifpucit/coal-repo/
Overview of microprocessor families and their corresponding assembly languages. Toolchain and programming environment for x86-64 assembly programming. Running the first hello world assembly program.
email: arif@pucit.edu.pk
web: http://arifbutt.me
Sample Codes/Resources: https://bitbucket.org/arifpucit/coal-repo/
Lec 30 Structure of x86 64 Assembly Program (Arif Butt @ PUCIT)
A discussion on the x86-64 assembly language instruction format and the overall structure of assembly program including the contents of .data, .bss and .text section. A scuba diving in the sea of how a system call is made.
email: arif@pucit.edu.pk
web: http://arifbutt.me
Sample Codes/Resources: https://bitbucket.org/arifpucit/coal-repo/
Lec 31 Debugging C Programs with GDB (Arif Butt @ PUCIT)
A discussion on the x86-64 assembly language instruction format and the overall structure of assembly program including the contents of .data, .bss and .text section. A scuba diving in the sea of how a system call is made.
email: arif@pucit.edu.pk
web: http://arifbutt.me
Sample Codes/Resources: https://bitbucket.org/arifpucit/coal-repo/
A review of the C-compilation process. What is a debugger? Why use gdb? How to compile, load, and run a program inside gdb and get information about the running process. Getting help inside gdb, setting breakpoints, watch points, stepping through the code, examining and modifying variables, convenience variables, and setting conditional breakpoints.
email: arif@pucit.edu.pk
web: http://arifbutt.me
Sample Codes/Resources: https://bitbucket.org/arifpucit/coal-repo/
Usage of different data types and special tokens in NASM. Practically understand about the endianness of a machine
email: arif@pucit.edu.pk
web: http://arifbutt.me
Sample Codes/Resources: https://bitbucket.org/arifpucit/coal-repo/
Lec 33 Data Transfer Instructions and Process Stack (Arif Butt @ PUCIT)
Usage of different move instructions like mov, movzx, movsx, lea and xchg. A discussion on the working of the process stack and the push and pop instructions.
email: arif@pucit.edu.pk
web: http://arifbutt.me
Sample Codes/Resources: https://bitbucket.org/arifpucit/coal-repo/
Usage of different move instructions like mov, movzx, movsx, lea and xchg. A discussion on the working of the process stack and the push and pop instructions.
email: arif@pucit.edu.pk
web: http://arifbutt.me
Sample Codes/Resources: https://bitbucket.org/arifpucit/coal-repo/
Lec 34 Memory Addressing Modes (Arif Butt @ PUCIT)
Lec 34 Memory Addressing Modes (Arif Butt @ PUCIT)
email: arif@pucit.edu.pk
web: http://arifbutt.me
Sample Codes/Resources: https://bitbucket.org/arifpucit/coal-repo/
Lec 34 Memory Addressing Modes (Arif Butt @ PUCIT)
email: arif@pucit.edu.pk
web: http://arifbutt.me
Sample Codes/Resources: https://bitbucket.org/arifpucit/coal-repo/
Lec 35 Arithmetic Instructions - I (Arif Butt @ PUCIT)
A recap of the x86-64 register set and the programming toolchain. Summary of major categories of x86-64 instructions. A practical demo on the use of add, adc, sub, sbb, inc, dec, neg, cmp, clc, stc, and cmc. A discussion on how the flags are effected after these arithmetic instructions
email: arif@pucit.edu.pk
web: http://arifbutt.me
Sample Codes/Resources: https://bitbucket.org/arifpucit/coal-repo/
A recap of the x86-64 register set and the programming toolchain. Summary of major categories of x86-64 instructions. A practical demo on the use of add, adc, sub, sbb, inc, dec, neg, cmp, clc, stc, and cmc. A discussion on how the flags are effected after these arithmetic instructions
email: arif@pucit.edu.pk
web: http://arifbutt.me
Sample Codes/Resources: https://bitbucket.org/arifpucit/coal-repo/